1. Field of the Invention
The present invention relates to sensing voltage across power devices that provide output power signals. More specifically, voltage feedback signals for high and low side power devices can improve deadtime compensation, such as for a pulse width modulated (PWM) motor. Also, a signal indicating voltage sensed across a device can be used both for voltage feedback and also to turn off the device to protect against a short circuit condition.
2. Brief Description of the Related Art
In PWM AC inverter-based motor drive systems, deadtime has been a problem. Deadtime is required in order to avoid cross conduction within an inverter leg of the power circuit. When the motor rotates at low speed, the PWM modulation index becomes small, resulting in significant pulse losses due to deadtime insertion between the high side and the low side switching devices.
In order to correct this voltage distortion, many deadtime compensation techniques have been proposed in the past. One technique measures the actual high voltage transition of the motor phase voltage and compares it against the commanded voltage. The error is then used to correct the voltage difference.
Many attempts have been made to measure the motor phase voltage in the PWM AC inverter drive circuit. One technique to sense the high voltage transition uses an optically isolated device. Another technique uses a high resistive divider circuit to sense the high voltage. U.S. Pat. No. 5,764,024, for example, shows a technique in which the output to the motor is connected directly to a voltage sensor that senses when a voltage passes a threshold and provides a digital output signal in response. These traditional techniques, however, suffer from an inaccuracy problem stemming from the inevitable time delay associated with component variation and parasitic circuitry.
When implemented by optically isolated devices, variation of transfer delay among each optically isolated device is large and normally exceeds an order of microseconds. Given the present day PWM pulse resolution of 50 nanoseconds, this represents an unacceptable accuracy range.
When implemented by using a resistor divider network, the signal delay is also unacceptable. This delay is largely due to the fact that the parasitic capacitance combined with the high value of the resistor divider circuit forms a relatively large time constant filter which can be on the order of microseconds. (For example, 1 megaohm resistance combined with 5 pF parasitic capacitance forms a 5 microsecond time constant.)
The inaccuracy problem is further pronounced when the motor current reaches near zero as can be understood from FIGS. 1A-1D. FIG. 1A shows a conventional half bridge circuit 10, which can form one leg of a PWM AC inverter circuit. High side transistor (Q1) 12 and low side transistor (Q2) 14 are insulated gate bipolar transistors (IGBTs). The gate lead of transistor 12 receives drive signal HO, while the gate lead of transistor 14 receives drive signal LO. Output node 20, connected at the midpoint between transistor 12 and transistor 14, provides output voltage Vm to motor 22. Motor current Ia is defined as the current that flows from node 20 to motor 22. High side diode (D1) 30 and low side diode (D2) 32 permit current flow across transistor 12 and transistor 14, respectively.
The waveforms in FIGS. 1B and 1C illustrate operation of circuit 10 when a large current is flowing from output node 20 to motor 22 (Ia greater than 0), shown as case 1 in FIG. 1B, and when a large current is flowing from motor 22 to output node 20 (Ia less than 0), shown as case 2 in FIG. 1C. In other words, two different cases of phase voltage switching occur at node 20, depending on the direction of motor current Ia. In both FIGS. 1B and 1C, the uppermost waveform is a PWM voltage command signal received by control circuitry, which responds by providing high side drive signal HO and low side drive signal LO with deadtime inserted for a predetermined time period, shown in the second and third waveforms in FIGS. 1B and 1C respectively.
In case 1, when the motor phase current Ia is positive, the output drive voltage Vm, shown in the fourth waveform in FIG. 1B, is biased to DC(xe2x88x92) from t0 to t1 and from t1 to t2. During this period, current is only able to flow from the DC(xe2x88x92) bus through diode 32 to node 20 (and hence to motor 22) because transistor 12 is turned off from t0 to t2. HO goes high at t2, turning on transistor 12 and allowing current to flow from the DC(+) bus to node 20 so that Vm is immediately biased to DC(+). Then, when HO goes low at t3, turning off transistor 12, current again begins to flow through from the DC(xe2x88x92) bus through diode 32 to node 20 and Vm is again biased to DC(xe2x88x92). Therefore, in case 1, Vm is completely determined by HO switching.
In case 2, when the motor phase current Ia is negative, the output drive voltage Vm is biased to DC(xe2x88x92) from t0 to t1. This is because LO is high, turning on transistor 14 and allowing current to flow from motor 22 through transistor 14 to the DC(xe2x88x92) bus. At t1, LO goes LO, turning off transistor 14 so that current is only able to flow from motor 22 through diode 30 to the DC(+) bus. Therefore, Vm quickly changes bias to DC(+) at t1. At t2 and t3, current continues to flow through diode 30 even when transistor 12 turns on or off, because diode 30 is the only current path from node 20 to either DC bus. At t4, LO goes high and turns on transistor 14, allowing current to flow from node 20 through transistor 14 to the DC(+) bus. Vm accordingly changes bias to DC(xe2x88x92) at t4. Therefore, in case 2, Vm is completely determined by LO switching.
In general, when motor current Ia is distinctively positive or negative, as in cases 1 and 2, the output drive voltage Vm follows either HO or LO, respectively. When motor current Ia is near zero, however, the output drive voltage Vm does not simply follow either HO or LO.
During a near zero current (Ia≈0) between node 20 and motor 22, illustrated in FIG. 1D, Vm can begin rising from its low value at t1 with a high initial positive slope, as illustrated by segment 40, and then can rise at a lower slope, as illustrated by segment 42, finally rising again at a high positive slope beginning at approximately t2 until it reaches its high value, as illustrated by segment 44. Vm can remain at its high value until t3, as illustrated by segment 46, after which it can decrease at a high initial negative slope, as illustrated by segment 50, and then can decrease at a lower slope, as illustrated by segment 52, finally decreasing again at a high negative slope until it reaches its low value at approximately t4, as illustrated by segment 54.
FIG. 1D therefore shows that the actual phase voltage transition becomes nonlinear and makes non-smooth transitions during deadtime inserted between t1 and t2 and between t3 and t4. This occurs because the inverter leg circuit shown in FIG. 1A appears essentially as a high impedance during deadtime intervals with a near zero motor current. Voltage potential at segment 42 and 52 is determined by Counter Electromotive Force (CEMF) or Back Electromotive Force (Back EMF) at moment of deadtime. In this condition, it might be possible to track the voltage transition more accurately using multiple outputs during the voltage transition or an accurate analog output. So far, however, no known technique has successfully overcome the inaccuracy problem.
The present invention provides new voltage sensing techniques. The new techniques can be used, for example, to sense motor phase voltage in a PWM AC inverter circuit.
One of the new techniques provides voltage feedback for both low and high side power devices, such as power transistors connected in a half bridge. This new technique can be implemented in a circuit in which sensing circuitry senses voltage changes across the low and high side power devices and provides low and high side sense signals indicating respectively when voltage changes across the low and high side power devices.
The new techniques therefore make it possible to alleviate the inaccuracy problem described above by providing information about both power devices. For example, if the on times of the power devices are separated by deadtime as described above, one of the low and high side sense signals can indicate a beginning of the deadtime and the other can indicate an ending. As a result, deadtime compensation can be performed more accurately.
The new voltage feedback circuit can also include feedback signal circuitry that provides first and second feedback signals obtained from the low and high side sense signals. The feedback signal circuitry can include level shifting circuitry to shift one of the sense signals so that the first and second feedback signals are in approximately the same range. For example, the high side sense signal can be shifted downward.
The new voltage feedback circuit can be included in an integrated circuit that has appropriate pins. For example, the first and second feedback signals can be provided by low and high side feedback output pins. Or the sensing circuitry can include both low and high side sensing circuitry, each with a sense input pin to receive a sense input signal with information about voltage across its power device; for example, the sense input signal can indicate voltage at the device""s power supply lead. Each side""s sensing circuitry can also include a comparator with one input receiving the sense input signal and the other receiving a reference voltage relative to the device""s ground lead; the comparator""s result signal can thus include a transition between low and high values when voltage changes across the respective power device.
Another new voltage sensing technique combines sensing for voltage feedback with sensing for shutdown, such as to prevent damage due to a short circuit. This technique can be implemented in a power control circuit that includes driving circuitry providing output drive signals to the gate lead of a power device and sensing circuitry that provides a sense result signal indicating whether voltage across the power device is greater than a reference voltage. The circuit can also include both feedback signal circuitry and shutdown circuitry. The feedback signal circuitry can receive the sense result signal and, in response, can provide a voltage feedback signal indicating when voltage changes across the power device. The shutdown circuitry can also receive the sense result signal and can cause the driving circuitry to turn off the power device if it detects an abnormal overcurrent condition. For example, the shutdown circuitry can detect an abnormal overcurrent if the power device is turned on when the sense result signal indicates that voltage across the power device is greater than the reference voltage.
The new power control circuit can also be implemented in an integrated circuit that has appropriate pins. For example, a sense input pin can receive a sense input signal indicating voltage at the power device""s power supply lead, and the sensing circuitry can include a comparator with first and second inputs connected as described above. The driving circuitry can include a driver that provides the output drive signals in response to the shutdown circuitry and in response to an input drive signal indicating whether to turn on or off the power device. More specifically, the driver can provide the output drive signals in accordance with the input drive signal except when the shutdown circuitry causes the driver to turn off the power device. The driving circuitry can also include a driver output pin for connecting to provide the output drive signals to the power device""s gate lead.
The two new voltage sensing techniques described above can be used together to provide an especially elegant circuit. For example, driving circuitry, sensing circuitry, shutdown circuitry, and feedback signal circuitry as described above can provide signals for both the low and high side power devices. Where appropriate, separate circuitry can be provided on the low and high sides.
The power devices can be transistors, such as insulated gate bipolar transistors (IGBTs), connected in a half bridge with a power output node connected to the power supply lead of the low side power device and the ground lead of the high side power device. The power output node can also be connected to provide the output power signal to a motor, and each input drive signal can be derived from a pulse width modulated drive signal and can be received on the low and high sides by respective driver input pins. The high side driving circuitry can also include upward level shifting circuitry that shifts the high side input drive signal to a high side voltage range.
Other features and advantages of the present invention will become apparent from the following description of the invention which refers to the accompanying drawings.